Friday, January 8, 2010

Motorola RISC

The Motorola 68060 is much faster than its predecessor, mainly due to higher clock speed, superscalar design, larger instruction and data caches and branch prediction. Under the best conditions the 68060 can execute one integer instruction and one Floating-Point instruction per clock cycle, or up to 2 integer instructions and one branch instruction per clock cycle. Not all integer instructions can be executed simultaneously. Also, the CPU cannot execute the instructions out of order.

Supervisor mode of the Motorola 68060 CPU differs from the 68040 due to changes in exception processing. User mode of the Motorola 68060 is object-compatible with MC68040, assuming that the CPU uses special software to simulate a few instructions that were present in 68040 CPU and are missing in MC68060.The 68060 CPU uses lower voltage - 3.3 Volt as opposed to 5 Volt for 68040. Lower core voltage directly translates into lower CPU power requirements. For example, 68060 66 MHz dissipates as much power as 68040 33 MHz. In addition to lower voltage the 68060 includes other power-saving features, such as powering down individual chip units when they are not in use, and ability to stop the clock while saving the contents of CPU registers.

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